Welcome to Stract Technology Ltd.

 CopperLink™

 CE121A

 Ethernet 112G linear driver  

Description

CE121A is a 112Gbps PAM4 quad channel linear PAM4 equalizer designed for Active Copper Cable (ACC) assembly applications to provide reach extension over that of a passive Direct Attach Copper (DAC) Twinaxial (Twinax) cable assembly. CE121A can also be used in backplane and onboard applications to extend the trace lengths of interconnects for reliable high-speed communication between two end points. 

Feature 

· Quad 56GBaud (112Gbps) linear equalizer 

· Low power consumption 

· Operates from a single 3.3V power supply with an integrated POR 

· Low latency 

· Linear PAM4 programmable equalizer optimized for 56GBaud copper link with up to 15dB equalization 

Enables a transparent ACC solution meeting all IEEE 400GBASE-CR4 Auto-Negotiation and Link Training requirements 

Block Diagram

 CopperLink™

 CE221A

Ethernet 224Gbps linear driver 

Description

CE221A is a 224Gbps PAM4 quad channel linear PAM4 equalizer designed for Active Copper Cable (ACC) assembly applications to provide reach extension over that of a passive Direct Attach Copper (DAC) Twinaxial (Twinax) cable assembly. CE221A can also be used in backplane and onboard applications to extend the trace lengths of interconnects for reliable high-speed communication between two end points. 

Feature 

· Quad 112GBaud (224Gbps) linear equalizer 

· Low power consumption 

· Operates from a single 3.3V power supply with an integrated POR 

· Low latency 

· Linear PAM4 programmable equalizer optimized for 112GBaud copper link with up to 20dB equalization 

· Enables a transparent ACC solution meeting all IEEE 800GBASE-CR4 Auto-Negotiation and Link Training requirements 

Block Diagram

 CopperLink™

    CP720A

  PCIe® 7.0 128Gbps 4-Channel Linear Redriver

Description

CP720A 4-Channel Linear Redriver is a low-power, high-performance linear equalizer supporting multi-rate, multi-protocol interfaces. It supports up to 64GBd using four-level pulse amplitude modulation (PAM4) or up to 64GBd using non-return-to-zero (NRZ) modulation. It extends the reach and robustness of high-speed serial links for active copper cable (ACC), backplane, and midplane applications. The CP720A can increase the reach between two ASICs by 18+dB beyond the normal ASIC-to-ASIC reach. 

Feature 

• Quad channel PCIe 7.0 linear redriver 

• Protocol agnostic linear redriver compatible to PCIe, UPI, CCIX, NVLink, DisplayPort, SAS, SATA, and XFI

• Single 3.3V supply – PCIe power rail can be used

• Low 720mW active power for 4-channel operation

• No heat sink required

• Provides equalization up to 24dB at 32GHz

• Excellent RX/TX differential RL of -10dB for 32GHz

• Low additive RJ and Low latency 

• Automatic receiver detection and seamless support for PCIe link training

• Device configuration by pin control or SMBus / I2C.

• Internal voltage regulator provides immunity to supply noise

Block Diagram

 PhotoLink™

     PT221A 

Quad 224Gbps PAM4/NRZ VCSEL Driver    

Description

   The PT221A is a Quad 112 GBaud PAM4/NRZ VCSEL Driver designed to directly modulate VCSELs in transmit path of optical modules.  It is available in bare die form to an optical modulator. It achieves maximum bandwidth, minimum size and minimum power dissipation of only 400 mW per channel. The outputs are spaced on 250 μm centers to be compatible with standard optical interfaces. It provides I2C interface which allows digital programmable control of bias and modulation currents to eliminate the need for external components. 

Feature    

  · Quad 112 GBaud PAM4 VCSEL Driver

· 250μm output center spacing

· Low Noise

· Low Power, 400mW/channel (@ 3.3V)

· detector on each output for frequency response peaking adjustment

Block Diagram

 PhotoLink™

   PR221A 

Quad Linear 224Gbps PAM4 Transimpedance Amplifier   

Description

 The PR221A is a Quad 112GBaud linear PAM4 TIA with automatic gain control. The PR221A consumes very low power, typically 350mW/channel at 3.3V supply. It is spaced 250um anode to anode, to be compatible with standard optical interfaces. Features include RSSI for photo-alignment and power monitoring, and I2C control of bandwidth, output amplitude, peaking, LOS, gain and other parameters 

Feature    

·Quad 112GBaud PAM4 TIA

· 250μm Anode to Anode spacing

· Low Noise

· Low Power, 350mW/channel (@ 3.3V)

· Integrated AGC loop

· RSSI for photo-alignment and monitoring.

· Flexible, integrated PINK regulator enabling very large and small reverse bias voltage on PD.

· Supported die temperature range: -40°C to +85°C

· Integrated ADC for digital readout of RSSI and temperature.

Block Diagram

DataLink™

SADC3581

18-Bit 5/10/25/60 MSPS ADC

Features

  Dual Channel ADC 

 ENOB: 14.5 bits (at Fin = 5 MHz)

 Nyquist Update Rate: 1 -2 Clock Cycle Latency

 DNL: <1 LSB

 INL: <1 LSB 

 SNDR/SFDR: 86 dB/ 99 dB (at Fin = 5MHz)

 Serial LVDS digital Interface

 Full Scale Voltage Range: Maximum at Min(2, AVDD)

 DC Offset Voltage: < 10mV after calibration. < 25mV without calibration

 Power Consumption: TBD

 Power Supply: 1.8V(Analog), 1.2V(Digital)

 Technology: 0.13 um BiCMOS technology